Logic Circuits That Add and Remember · seed 1 · A4, ink-friendly. The answer key prints on its own page for grown-ups.
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Circuits that add and remember

Computing · Computer Systems · ages 16-17
Name ______________________   Date ____________

  1. Which set contains the three inputs of a full adder?

    • two column bits and the incoming carry
    • the sum bit and two outgoing carry bits
    • two column bits and a clock-edge signal

  2. A half adder receives 1 and 1. What does it output?

    • sum 1, carry 0
    • sum 0, carry 1
    • sum 1, carry 1

  3. A powered static flip-flop stores one bit of state.

    Circle one:   True   False

  4. Four correctly chained full adders add unsigned 0111 and 0001, starting with carry in 0. What is the result?

    • sum 1000, final carry 0
    • sum 0000, final carry 1
    • sum 0110, final carry 0

  5. A full adder receives A = 1, B = 1 and carry in = 1. What are its outputs?

    • sum 0, carry 1
    • sum 1, carry 0
    • sum 1, carry 1

  6. Unsigned 1110 + 0011 produces four sum bits 0001 and final carry 1. What does the carry tell you?

    • The exact sum is 1 and fits in four bits.
    • The exact sum is 17 and needs five bits.
    • The exact sum is 15 and has no lost bits.

  7. A powered static D flip-flop captures 1 at its active clock edge. Its data input then changes to 0 before another edge. Why does its output remain 1?

    • The data input forces the output to remain unchanged.
    • Internal feedback retains the state between updates.
    • The adder carry chain keeps supplying the stored bit.

  8. A builder forces every carry-in input to 0 instead of connecting the carry chain. For unsigned 0001 + 0001, what happens?

    • The sum becomes 0010 because carries still travel left.
    • The sum becomes 0001 because the first sum bit stays 1.
    • The sum becomes 0000 because the needed carry is lost.
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Answer key

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Circuits that add and remember W1-mt_zPgkt6zf-i-s1

  1. two column bits and the incoming carry · A full adder adds two bits from its column and the carry arriving from the column on its right.
  2. sum 0, carry 1 · 1 + 1 is binary 10. Its right bit is sum 0 and its left bit is carry 1.
  3. True · Its stored state is one bit, either 0 or 1. Internal feedback retains that state between updates while powered.
  4. sum 1000, final carry 0 · The carry passes through the three rightmost columns. The result is 1000 with final carry 0, so the unsigned sum fits.
  5. sum 1, carry 1 · The three inputs total 3, which is binary 11. The sum bit and carry out are both 1.
  6. The exact sum is 17 and needs five bits. · 1110 is 14 and 0011 is 3. Their sum is 17, or binary 10001. Keeping only 0001 loses the fifth bit.
  7. Internal feedback retains the state between updates. · The flip-flop captured 1 at the edge. Internal feedback retains that state; a later data-input change does not update it without another active edge.
  8. The sum becomes 0000 because the needed carry is lost. · The rightmost column outputs sum 0 and carry 1. The next column receives forced 0 instead of that carry, so all four sum bits are 0.
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