---
title: "Pipelining and the Cost of a Hazard"
description: "Splitting instruction handling into stages lets one instruction start before the last has finished, raising throughput without making any single instruction faster. Dependencies between neighbouring i"
canonical: https://lightmysky.com/learn/computing/pipelining-and-the-cost-of-a-hazard-mt_GI_fPY9d6s
source: https://lightmysky.com/learn/computing/pipelining-and-the-cost-of-a-hazard-mt_GI_fPY9d6s.md
retrieved: 2026-09-12
---

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# Pipelining and the Cost of a Hazard

Splitting instruction handling into stages lets one instruction start before the last has finished, raising throughput without making any single instruction faster. Dependencies between neighbouring instructions and unresolved branches force stalls, which is the price of the arrangement.

Subject: Computing · Area: Computer Systems · Ages 18 to 20
Page: https://lightmysky.com/learn/computing/pipelining-and-the-cost-of-a-hazard-mt_GI_fPY9d6s

## Ready when they can

- Draw a pipeline diagram for five instructions and count the cycles saved
- Spot a data hazard between two neighbouring instructions and say how forwarding helps
- Explain why a mispredicted branch throws away work

## Lesson: Overlapping work without rushing it

A processor splits each instruction into five steps and overlaps them like an assembly line. Five instructions need twenty five steps alone, yet the line finishes all five in nine rounds: five for the first, plus one for each follower. More finish per round, though no single one runs faster.

Overlap breaks when neighbours share data. If one instruction needs a result the prior one has not finished, the line must wait. Forwarding wires the fresh result straight back, which cuts most of the wait.

**Example.** A branch guesses which way the code turns and fills the line on that guess. When the guess proves wrong, every half-done step from the wrong path is thrown away and the line refills. That dumped work is the price of the wrong guess.

**Tip.** Throughput counts finished instructions per round, latency counts rounds per instruction. Pipelining lifts the first number and leaves the second near five.

**Recap.** Overlap lifts finished work per round, hazards force waits, and wrong guesses dump half-done work.

## Practice

8 questions on this page, each with its working shown.

## Needs first

- [The Memory Hierarchy and Why Caching Works](https://lightmysky.com/learn/computing/the-memory-hierarchy-and-why-caching-works-mt_0f5ArFPlxP)
- [Registers, Buses and the Fetch-Execute Cycle in Detail](https://lightmysky.com/learn/computing/registers-buses-and-the-fetch-execute-cycle-in-detail-mt_yjy3eSStzH)

## Opens up

- [Many Cores and the Limit on Speedup](https://lightmysky.com/learn/computing/many-cores-and-the-limit-on-speedup-mt_dy3-K9dV19)