---
title: "Registers, Buses and the Fetch-Execute Cycle in Detail"
description: "What each register holds during one cycle, from the program counter and the address and data registers through to the accumulator, and what travels on the address, data and control buses. A branch is "
canonical: https://lightmysky.com/learn/computing/registers-buses-and-the-fetch-execute-cycle-in-detail-mt_yjy3eSStzH
source: https://lightmysky.com/learn/computing/registers-buses-and-the-fetch-execute-cycle-in-detail-mt_yjy3eSStzH.md
retrieved: 2026-09-12
---

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# Registers, Buses and the Fetch-Execute Cycle in Detail

What each register holds during one cycle, from the program counter and the address and data registers through to the accumulator, and what travels on the address, data and control buses. A branch is just an instruction writing to the program counter.

Subject: Computing · Area: Computer Systems · Ages 16 to 18
Page: https://lightmysky.com/learn/computing/registers-buses-and-the-fetch-execute-cycle-in-detail-mt_yjy3eSStzH

## Ready when they can

- Walk one instruction through the cycle, naming the register holding each value at each step
- Say what a branch does to the program counter and when that happens in the cycle
- Explain what a wider address bus or data bus changes about the machine

## Lesson: One instruction journey through the CPU

Every instruction takes the same three trip: fetch it from memory, decode what it asks, then execute it. The program counter holds the address of the next instruction to fetch, so the machine always knows where to look. Fetch copies that instruction into the CPU and moves the counter on to the following address.

**Example.** Trace an add step by step. Fetch: the address register carries where to read from, and the data register receives what comes back. Decode: the control unit reads the instruction and lines up the arithmetic unit. Execute: the values add and the accumulator keeps the running result, ready for whatever comes next.

Three buses do the carrying. Addresses travel on the address bus, values travel on the data bus, and timing signals travel on the control bus. A branch is simply an instruction that writes a new address into the program counter during execute, so the next fetch jumps instead of stepping on.

**Tip.** Bus width sets what the machine can do. A wider address bus reaches more memory locations, while a wider data bus moves more bits per step. When asked what changes, point at reach for address width and chunk size for data width.

**Recap.** Fetch, decode, execute repeats, registers hold each value along the way, and a branch just rewrites the counter.

## Practice

8 questions on this page, each with its working shown.

## Needs first

- [Memory and Storage: RAM, ROM and the Backing Store](https://lightmysky.com/learn/computing/memory-and-storage-ram-rom-and-the-backing-store-mt_AiXGJioO_S)
- [Assembly Language and the Instruction Set](https://lightmysky.com/learn/computing/assembly-language-and-the-instruction-set-mt_bzmsfvdzwp)

## Opens up

- [Pipelining and the Cost of a Hazard](https://lightmysky.com/learn/computing/pipelining-and-the-cost-of-a-hazard-mt_GI_fPY9d6s)
- [Instruction Set Architecture as a Contract](https://lightmysky.com/learn/computing/instruction-set-architecture-as-a-contract-mt_pbwHRePY5M)
