Among ordinary LOAD, ADD and STORE instructions in the lesson's load-store model, which access data memory?
- Loads and stores
- Every arithmetic instruction
- Stores, but not loads
Which group describes the programmer-visible interface specified by an ISA?
- Clock speed, cache capacity, and the number of internal pipeline stages
- Instruction encodings and behaviour, visible registers, and addressing rules
- Power-supply voltage, cooling equipment, and the chip's physical dimensions
Two chips with different internals can run the same application binary when both support its required ISA features, execution mode and software environment.
Circle one: True False
A chip changes internal scheduling but preserves the binary's required ISA behaviour, execution mode and software support. Can the old binary still run?
- Yes; scheduling changed without removing its required support.
- No; every internal scheduling change requires a new binary file.
- Only after recompiling; binaries encode the internal schedule.
Model A updates y using LOAD R,[y]; ADD R,#4; STORE [y],R. Model B's ADDMEM [y],#4 reads, adds and writes. Which comparison is correct?
- A uses 1 instruction combining the actions; B uses 3 separate instructions.
- A uses 3 instructions; B uses 1 without reading or writing any memory.
- A uses 3 instructions; B uses 1 that reads, adds and writes.
Which change can preserve the interface used by existing binaries?
- Removing an ISA register used by existing binary instructions
- Changing only the chip's internal instruction scheduling
- Removing an ISA operation used by existing binary instructions
A new chip keeps 8 ISA-visible registers but adds 32 internal physical registers and a deeper pipeline. It preserves the old binary's ISA behaviour, mode and software support. Is recompilation required for these internal changes?
- Yes; the binary must be rewritten to name all 32 physical registers.
- No; its encoded interface and other required support remain available.
- Yes; the binary must be rewritten to name the extra pipeline stages.
An old binary selects ISA register 5. A designer removes that register but says changing its assembly name will keep the binary working. Why is that claim unsafe?
- The binary automatically selects register 6, changing every instruction's timing.
- The assembler rewrites the stored binary to select register 6 without rebuilding it.
- The binary still selects register 5, which the new chip does not provide.